1. Field of the Invention
The present invention relates to a data writing system for a semiconductor memory used as a data memory in, for example, an IC card, and, in particular, to an auto page writing system for an EEPROM.
2. Description of the Related Art
EEPROMs, which permit electrical data erasing and rewriting, have recently become the object of considerable attention as a semiconductor memory for replacing EPROMs. Due to the EEPROMs requiring longer data writing time than EPROMs, however, various improvements have been made to the EEPROMs.
Of the improved EEPROMs, what is receiving attention is the type which has a buffer constituted by, for example, a RAM of several bytes such that data writing is done in the buffer within a specified time period and the contents of the buffer are then internally written in the EEPROM. The data writing time in this memory is about the same as what is required of an EPROM, so that the data writing time appears to be shortened. This EEPROM utilizes a system in which the memory is divided on the basis of the paging concept and some lower significant bits of an address data sent to the memory indicate the number of bytes in a page and the remaining higher significant bits indicate the number of pages. From that concept, this system is called a so-called page writing function.
A conventional page writing system functions as follows. Data for the page to be written is transferred into advance in the buffer from the memory, and data externally input replaces the data in the buffer. After a specified time, all the contents of the buffer are stored again in the specified page of the memory.
According to this system, for example, with an EEPROM of 8192 words.times.8 bits, if each page has a 16 byte area, then address "0000.sub.H " and address "000F.sub.H " exist in the same page. If only the data at address "0000.sub.H " is rewritten, data from address "0000.sub.H " to address "000F.sub.H " is temporarily stored in the buffer where the data corresponding to address "0000.sub.H " alone is rewritten. Then, all the data in the buffer is written in the memory area from address "0000.sub.H " to address "000F.sub.H ". That is, even if the data at address "0000.sub.H " alone is rewritten, data writing is actually done to address "000F.sub.H ". Provided that the maximum rewritable number for an EEPROM is 10000, when data rewriting is done only to "0000.sub.H " 10000 times, there would not be any guarantee for proper data writing for "000F.sub.H ". In other words, the writing times for the memory cells is excessive in this case, thus reducing the life of the memory cells.
Conventionally, the write data reception time is fixed so that, when data input time is half the write data reception time in order to rewrite all the contents of a given page, the conventional EEPROM does not start the internal data writing unless the remaining half of the write data reception time is elapsed. From a global point of view, this results in a time loss in executing page writing, thus making it impossible to provide a higher data writing.
Further, according to the prior art, in order to cancel the page writing operation after data access is done within a given time for page writing, it is necessary to power off the EEPROM, for example, by shutting off the power supplied thereto.
In addition, the time specified for data writing in the buffer is only described in the specification. Therefore, the page writing operation for an EEPROM serving as an external unit is designed on the basis of the value given in the specification. Depending on EEPROMs, however, when the specified writing time becomes short due to some factors such as data writing environment, the external unit may erroneously recognize as if all the accessed data has been written. In this respect, therefore, there is a demand for a system which permits such an external unit to easily recognize whether or not an EEPROM is in the data reception state.